diff options
author | Zheng Bao <fishbaozi@gmail.com> | 2022-04-03 12:53:51 +0800 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-04-13 23:25:00 +0000 |
commit | c3007f38770d192bf32b75331371568447b3623e (patch) | |
tree | 0d7b777dd9e8551d89341ede427013eda3fd2f56 /util | |
parent | e3a4a13607dda3d1aeb88d82b940f43bdb39ced4 (diff) |
amdfwtool: Add a flag to record the second gen instead of romsig
This is for future feature combo, which gets the soc id from fw.cfg in
a loop instead of the command line, and the romsig is not set until
fw.cfg is processed.
Change-Id: Id50311034b46aa1791dcc10b107de4af6c86b927
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63344
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'util')
-rw-r--r-- | util/amdfwtool/amdfwtool.c | 50 | ||||
-rw-r--r-- | util/amdfwtool/amdfwtool.h | 1 |
2 files changed, 38 insertions, 13 deletions
diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index 23273e6c9f..646a744bc0 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -1373,27 +1373,32 @@ static void register_fw_addr(amd_bios_type type, char *src_str, } } -static int set_efs_table(uint8_t soc_id, embedded_firmware *amd_romsig, - uint8_t efs_spi_readmode, uint8_t efs_spi_speed, - uint8_t efs_spi_micron_flag) +static int set_efs_table(uint8_t soc_id, amd_cb_config *cb_config, + embedded_firmware *amd_romsig, uint8_t efs_spi_readmode, + uint8_t efs_spi_speed, uint8_t efs_spi_micron_flag) { if ((efs_spi_readmode == 0xFF) || (efs_spi_speed == 0xFF)) { fprintf(stderr, "Error: EFS read mode and SPI speed must be set\n"); return 1; } - switch (soc_id) { - case PLATFORM_STONEYRIDGE: + + /* amd_romsig->efs_gen introduced after RAVEN/PICASSO. + * Leave as 0xffffffff for first gen */ + if (cb_config->second_gen) { + amd_romsig->efs_gen.gen = EFS_SECOND_GEN; + amd_romsig->efs_gen.reserved = 0; + } else { amd_romsig->efs_gen.gen = EFS_BEFORE_SECOND_GEN; amd_romsig->efs_gen.reserved = ~0; + } + + switch (soc_id) { + case PLATFORM_STONEYRIDGE: amd_romsig->spi_readmode_f15_mod_60_6f = efs_spi_readmode; amd_romsig->fast_speed_new_f15_mod_60_6f = efs_spi_speed; break; case PLATFORM_RAVEN: case PLATFORM_PICASSO: - /* amd_romsig->efs_gen introduced after RAVEN/PICASSO. - * Leave as 0xffffffff for first gen */ - amd_romsig->efs_gen.gen = EFS_BEFORE_SECOND_GEN; - amd_romsig->efs_gen.reserved = ~0; amd_romsig->spi_readmode_f17_mod_00_2f = efs_spi_readmode; amd_romsig->spi_fastspeed_f17_mod_00_2f = efs_spi_speed; switch (efs_spi_micron_flag) { @@ -1413,8 +1418,6 @@ static int set_efs_table(uint8_t soc_id, embedded_firmware *amd_romsig, case PLATFORM_CEZANNE: case PLATFORM_MENDOCINO: case PLATFORM_SABRINA: - amd_romsig->efs_gen.gen = EFS_SECOND_GEN; - amd_romsig->efs_gen.reserved = 0; amd_romsig->spi_readmode_f17_mod_30_3f = efs_spi_readmode; amd_romsig->spi_fastspeed_f17_mod_30_3f = efs_spi_speed; switch (efs_spi_micron_flag) { @@ -1471,6 +1474,25 @@ static bool needs_ish(enum platform platform_type) return false; } +static bool is_second_gen(enum platform platform_type) +{ + switch (platform_type) { + case PLATFORM_STONEYRIDGE: + case PLATFORM_RAVEN: + case PLATFORM_PICASSO: + return false; + case PLATFORM_RENOIR: + case PLATFORM_LUCIENNE: + case PLATFORM_CEZANNE: + case PLATFORM_SABRINA: + return true; + case PLATFORM_UNKNOWN: + default: + fprintf(stderr, "Error: Invalid SOC name.\n\n"); + return false; + } +} + int main(int argc, char **argv) { int c; @@ -1702,6 +1724,8 @@ int main(int argc, char **argv) } } + cb_config.second_gen = is_second_gen(soc_id); + if (needs_ish(soc_id)) cb_config.need_ish = true; @@ -1810,7 +1834,7 @@ int main(int argc, char **argv) amd_romsig->xhci_entry = 0; if (soc_id != PLATFORM_UNKNOWN) { - retval = set_efs_table(soc_id, amd_romsig, efs_spi_readmode, + retval = set_efs_table(soc_id, &cb_config, amd_romsig, efs_spi_readmode, efs_spi_speed, efs_spi_micron_flag); if (retval) { fprintf(stderr, "ERROR: Failed to initialize EFS table!\n"); @@ -1822,7 +1846,7 @@ int main(int argc, char **argv) if (cb_config.need_ish) ctx.address_mode = ADDRESS_MODE_2_REL_TAB; - else if (amd_romsig->efs_gen.gen == EFS_SECOND_GEN) + else if (cb_config.second_gen) ctx.address_mode = ADDRESS_MODE_1_REL_BIOS; else ctx.address_mode = ADDRESS_MODE_0_PHY; diff --git a/util/amdfwtool/amdfwtool.h b/util/amdfwtool/amdfwtool.h index 3af4e941ac..d2571e58b3 100644 --- a/util/amdfwtool/amdfwtool.h +++ b/util/amdfwtool/amdfwtool.h @@ -276,6 +276,7 @@ typedef struct _amd_cb_config { bool load_mp2_fw; bool multi_level; bool s0i3; + bool second_gen; bool have_mb_spl; bool recovery_ab; bool need_ish; |