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authorFurquan Shaikh <furquan@google.com>2019-02-05 13:59:47 -0800
committerPatrick Georgi <pgeorgi@google.com>2019-02-07 08:51:53 +0000
commit86d2afb86b5c76fe8da719ce7746609eb1109ff0 (patch)
treeaec6533a08164e050740937c5bbf8ec14b7558ae /util
parent6527b1acc7a020e1f0594a7ea30daed0978dd5fd (diff)
soc/intel/cannonlake: Configure GPIOs again after FSP-S is done
FSP-S is currently configuring GPIOs that it should not. This results in issues where mainboard devices don't behave as expected e.g. host unable to receive TPM interrupts as the pad for the interrupt is re-configured as something else. Until FSP-S is fixed, this change adds a workaround by reconfiguring GPIOs after FSP-S is run. All mainboards need to call cnl_configure_pads instead of gpio_configure_pads so that SoC code can maintain a reference to the GPIO table and use that to re-configure GPIOs after FSP-S is run. BUG=b:123721147 BRANCH=None TEST=Verified that there are no TPM IRQ timeouts in boot log on hatch. Change-Id: I7787aa8f185f633627bcedc7f23504bf4a5250b4 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/31250 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
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