superiotool: Add dump facility for ITE IT8516 + I/O 0x20e/f

Change-Id: Iaea08b7eb5aac9ff1e0756f1400a82641bb45b14
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/3359
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

2 files changed, 133 insertions, 1 deletions

diff --git a/util/superiotool/ite.c b/util/superiotool/ite.c
index 7e167c8138..17e4452cf0 100644
--- a/util/superiotool/ite.c
+++ b/util/superiotool/ite.c
@@ -222,6 +222,60 @@ static const struct superio_registers reg_table[] = {
 		{EOT}}},
 	{0x8513, "IT8513E/F/G", {
 		{EOT}}},
+	{0x8516, "IT8516???", {
+		{NOLDN, "Chip ID",
+			{0x20,0x21, EOT},
+			{0x85,0x16, EOT}},
+		{NOLDN, "Chip Version",
+			{0x22,EOT},
+			{0x63,EOT}},
+		{NOLDN, "Super I/O Control Reigster (SIOCTRL)",
+			{0x23,EOT},
+			{0x01,EOT}},
+		{NOLDN, "Super I/O Configuration Register (SIOIRQ)",
+			{0x25,EOT},
+			{0x00,EOT}},
+		{NOLDN, "Super I/O General Purpose Register (SIOGP)",
+			{0x26,EOT},
+			{0x00,EOT}},
+		{NOLDN, "Super I/O Power Mode Register (SIOPWR)",
+			{0x2d,EOT},
+			{0x00,EOT}},
+		{0x01, "UART1",
+			{0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT},
+			{0x00,0x03,0xf8,0x00,0x00,0x04,0x02,EOT}},
+		{0x02, "UART2",
+			{0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT},
+			{0x00,0x02,0xf8,0x00,0x00,0x04,0x02,EOT}},
+		{0x04, "System Wakup-Up (SWUC)",
+			{0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT},
+			{0x00,0x00,0x00,0x00,0x00,0x00,0x01,EOT}},
+		{0x05, "Mouse",
+			{0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT},
+			{0x00,0x00,0x00,0x00,0x00,0x0C,0x01,EOT}},
+		{0x06, "Keyboard",
+			{0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT},
+			{0x00,0x00,0x60,0x00,0x64,0x01,0x01,EOT}},
+		{0x0f, "Shared Memory/Flash Interface (SMFI)",
+			{0x30,0x60,0x61,0x62,0x63,0x70,0x71,
+			 0xf4,0xf5,EOT},
+			{0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+			 NANA,NANA,EOT}},
+		{0x10, "BRAM / Real Time Clock (RTC)",
+			{0x30,0x60,0x61,0x62,0x63,0x70,0x71,
+			 0xf1,0xf2,0xf3,0xf4,0xf5,EOT},
+			{0x00,0x00,0x70,0x00,0x72,0x08,0x01,
+			 NANA,NANA,NANA,NANA,NANA,EOT}},
+		{0x11, "Power Management Interface Channel 1",
+			{0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT},
+			{0x00,0x00,0x62,0x00,0x66,0x01,0x01,EOT}},
+		{0x12, "Power Management Interface Channel 2",
+			{0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT},
+			{0x00,0x00,0x68,0x00,0x6c,0x01,0x01,EOT}},
+		{0x17, "Power Management Interface Channel 3",
+			{0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT},
+			{0x00,0x00,0x6a,0x00,0x6e,0x01,0x01,EOT}},
+		{EOT}}},
 	{0x8661, "IT8661F/IT8770F", {
 		{NOLDN, NULL,
 			{0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x20,0x21,0x22,
@@ -819,6 +873,77 @@ static const struct superio_registers ec_table[] = {
 	{EOT}
 };
 
+static const struct superio_registers bram_table[] = {
+	{0x8516, "IT8516???", {
+		{NOLDN, NULL,
+			{0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+			 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,EOT},
+			{NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,
+			 NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,EOT}},
+		{NOLDN, NULL,
+			{0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+			 0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f,EOT},
+			{NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,
+			 NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,EOT}},
+		{NOLDN, NULL,
+			{0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,
+			 0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
+			{NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,
+			 NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,EOT}},
+		{NOLDN, NULL,
+			{0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37,
+			 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,EOT},
+			{NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,
+			 NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,EOT}},
+		{NOLDN, NULL,
+			{0x40,0x41,0x42,0x43,0x44,0x45,0x46,0x47,
+			 0x48,0x49,0x4a,0x4b,0x4c,0x4d,0x4e,0x4f,EOT},
+			{NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,
+			 NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,EOT}},
+		{NOLDN, NULL,
+			{0x50,0x51,0x52,0x53,0x54,0x55,0x56,0x57,
+			 0x58,0x59,0x5a,0x5b,0x5c,0x5d,0x5e,0x5f,EOT},
+			{NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,
+			 NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,EOT}},
+		{NOLDN, NULL,
+			{0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67,
+			 0x68,0x69,0x6a,0x6b,0x6c,0x6d,0x6e,0x6f,EOT},
+			{NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,
+			 NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,EOT}},
+		{NOLDN, NULL,
+			{0x70,0x71,0x72,0x73,0x74,0x75,0x76,0x77,
+			 0x78,0x79,0x7a,0x7b,0x7c,0x7d,0x7e,0x7f,EOT},
+			{NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,
+			 NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,EOT}},
+		{NOLDN, NULL,
+			{0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,
+			 0x88,0x89,0x8a,0x8b,0x8c,0x8d,0x8e,0x8f,EOT},
+			{NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,
+			 NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,EOT}},
+		{NOLDN, NULL,
+			{0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,
+			 0x98,0x99,0x9a,0x9b,0x9c,0x9d,0x9e,0x9f,EOT},
+			{NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,
+			 NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,EOT}},
+		{NOLDN, NULL,
+			{0xa0,0xa1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7,
+			 0xa8,0xa9,0xaa,0xab,0xac,0xad,0xae,0xaf,EOT},
+			{NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,
+			 NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,EOT}},
+		{NOLDN, NULL,
+			{0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb6,0xb7,
+			 0xb8,0xb9,0xba,0xbb,0xbc,0xbd,0xbe,0xbf,EOT},
+			{NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,
+			 NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,EOT}},
+		{NOLDN, NULL,
+			{0xc0,0xc1,0xc2,0xc3,0xc4,0xc5,0xc6,0xc7,
+			 0xc8,0xc9,0xca,0xcb,0xcc,0xcd,0xce,0xcf,EOT},
+			{NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,
+			 NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,EOT}},
+		{EOT}}},
+	{EOT}
+};
+
 /* Works for: IT8661F/IT8770F */
 static const uint8_t initkey_it8661f[][4] = {
 	{0x86, 0x61, 0x55, 0x55},	/* 0x3f0 */
@@ -929,6 +1054,13 @@ static void probe_idregs_ite_helper(const char *init, uint16_t port)
 
 		printf("Environment controller (0x%04x)\n", ecport);
 		dump_superio("ITE-EC", ec_table, ecport, id, LDN_SEL);
+
+		regwrite(port, LDN_SEL, 0x10); /* Select LDN 16 (BRAM). */
+		/* Get EC base address (stored in LDN 16, index 0x62/0x63). */
+		ecport = regval(port, 0x62) << 8;
+		ecport |= regval(port, 0x63);
+		printf("BRAM (0x%04x)\n", ecport);
+		dump_superio("ITE-BRAM", bram_table, ecport, id, LDN_SEL);
 	}
 }
 
diff --git a/util/superiotool/superiotool.h b/util/superiotool/superiotool.h
index d8dd928a77..46f11a7985 100644
--- a/util/superiotool/superiotool.h
+++ b/util/superiotool/superiotool.h
@@ -235,7 +235,7 @@ static const struct {
 	{probe_idregs_fintek,	{0x2e, 0x4e, EOT}},
 	{probe_idregs_fintek_alternative,	{0x2e, 0x4e, EOT}},
 	/* Only use 0x370 for ITE, but 0x3f0 or 0x3bd would also be valid. */
-	{probe_idregs_ite,	{0x25e, 0x2e, 0x4e, 0x370, EOT}},
+	{probe_idregs_ite,	{0x20e, 0x25e, 0x2e, 0x4e, 0x370, EOT}},
 	{probe_idregs_nsc,	{0x2e, 0x4e, 0x15c, 0x164e, EOT}},
 	/* I/O pairs on Nuvoton EC chips can be configured by firmware in
 	 * addition to the following hardware strapping options. */