diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2016-07-27 05:30:50 +0530 |
|---|---|---|
| committer | Andrey Petrov <andrey.petrov@intel.com> | 2016-07-28 05:29:46 +0200 |
| commit | a90f41bdd71bd3f98c683702f90247e674a50896 (patch) | |
| tree | 460f30c32ed03a6ea494a4f155fbdea7359c937a /util | |
| parent | 89f6d6079ef88ff20c7da3422d1298d614ed6b5a (diff) | |
intel/fsp1_1: Add C entry support to locate FSP Temp RAM Init
FSP temp ram init was getting called earlier from ROMCC bootblock.
Now with C entry boot block, it is needed to locate FSP header and
call FspTempRamInit.
Hence add fsp 1_1 driver code to locate FSP Temp ram and execute.
BUG=chrome-os-partner:55357
BRANCH=none
TEST=Built kunimitsu and ensure FSP Temp Ram Init return success
Change-Id: If40b267777a8dc5c473d1115b19b98609ff3fd74
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/15787
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'util')
0 files changed, 0 insertions, 0 deletions