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authorElyes HAOUAS <ehaouas@noos.fr>2020-04-29 10:28:20 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-05-01 16:37:13 +0000
commit066e61f3ea1f65012b14467412e6b17351c87dc6 (patch)
tree0536c4c8d9059f1b765cc2388f6d6974d0486d54 /util
parentad87d1c8b9285cfed47b3ec060be520a467189ff (diff)
soc/intel/braswell: Fix 16-bit read/write PCI_COMMAND register
Change-Id: Ie213b8c08e2d2b33a1dc1fda632163160d1cd70e Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40849 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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