diff options
| author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2009-04-21 23:03:20 +0000 |
|---|---|---|
| committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2009-04-21 23:03:20 +0000 |
| commit | c6236edd47e2e470b9dfd756c24ced2f4c735e34 (patch) | |
| tree | b29fcdc70d35f45061686090492dabe4aa1f4d2c /util | |
| parent | 6fa03176371fc3ea2896e427050701a03bfc6c1e (diff) | |
flashrom: Add support for Gigabyte GA-MA790FX-DQ6. This board uses
IT8718F LPC->SPI translation for the flash chip.
Tested by Mateusz Murawski.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Mateusz Murawski <matowy@tlen.pl>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4161 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util')
| -rw-r--r-- | util/flashrom/board_enable.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/util/flashrom/board_enable.c b/util/flashrom/board_enable.c index 48092e5303..6fd2a84c51 100644 --- a/util/flashrom/board_enable.c +++ b/util/flashrom/board_enable.c @@ -661,6 +661,8 @@ struct board_pciid_enable board_pciid_enables[] = { {0x10de, 0x0360, 0, 0, 0, 0, 0, 0, "gigabyte", "m57sli", "GIGABYTE GA-M57SLI-S4", it87xx_probe_spi_flash}, {0x10de, 0x03e0, 0, 0, 0, 0, 0, 0, "gigabyte", "m61p", "GIGABYTE GA-M61P-S3", it87xx_probe_spi_flash}, {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4385, 0x1458, 0x4385, NULL, NULL, "GIGABYTE GA-MA78G-DS3H", it87xx_probe_spi_flash}, + /* SB600 LPC, RD790 North. Neither are specific to the GA-MA790FX-DQ6. The coreboot ID is here to be able to trigger the board enable more easily. */ + {0x1002, 0x438d, 0x1458, 0x5001, 0x1002, 0x5956, 0x1002, 0x5956, "gigabyte", "ma790fx-dq6", "GIGABYTE GA-MA790FX-DQ6", it87xx_probe_spi_flash}, {0x1039, 0x0761, 0, 0, 0, 0, 0, 0, "gigabyte", "2761gxdk", "GIGABYTE GA-2761GXDK", it87xx_probe_spi_flash}, {0x1022, 0x7468, 0, 0, 0, 0, 0, 0, "iwill", "dk8_htx", "IWILL DK8-HTX", w83627hf_gpio24_raise_2e}, {0x10de, 0x005e, 0, 0, 0, 0, 0, 0, "msi", "k8n-neo3", "MSI K8N Neo3", w83627thf_gpio4_4_raise_4e}, |