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authorGarrett Kirkendall <garrett.kirkendall@amd.corp-partner.google.com>2018-03-06 08:40:25 -0600
committerMartin Roth <martinroth@google.com>2018-03-07 17:54:47 +0000
commit050b6fb125d862e93719aba0ec8e8972415ece76 (patch)
tree1b90bfafed6261223a2038f03b1d61319cabb4ee /util/viatool
parent067a340117e37c5814a4f08128d831153539b54f (diff)
soc/amd/stoneyridge: Add southbridge definitions
* Add definitions to iomap.h for AMD ACPI MMIO base addresses. * Add FCH AOAC registers for enabling FCH devices. * From: BIOS and Kernel Developer's Guide (BKDG) for AMD Family 15h, Models 70h-7Fh Processors Rev 3.04 BUG=b:69220826 BRANCH=master TEST=abuild, build Gardenia, build and boot Grunt Change-Id: I45c1d1d7edc864000282c7ca4e2b8f2a14ea9eac Signed-off-by: Garrett Kirkendall <garrett.kirkendall@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/24998 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
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