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authorJohn Su <john_su@compal.corp-partner.google.com>2022-02-16 14:59:07 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-02-21 15:21:28 +0000
commitbf81c24e078c3eaea6cc2cd53e681579543c03a2 (patch)
tree536e3b220f4229e85ee4ebdeaf7378f13107c99c /util/vboot_list
parentaa41f773976f17979a6a32cc7f34d57df89aaeed (diff)
mb/google/brya/variants/felwinter: Adjust I2Cs CLK to be around 400 kHz
Need to tune I2C bus 0/1/3/5 clock frequency under the 400kHz for audio, TPM, touchscreen, and touchpad. Audio CLK: 385 kHz TPM CLK: 380.5 kHz Touch Screen CLK: 373.3 kHz Touch Pad CLK: 372.7 kHz BUG=b:218577918 BRANCH=master TEST=emerge-brya coreboot chromeos-bootimage measure by scope with felwinter. Signed-off-by: John Su <john_su@compal.corp-partner.google.com> Change-Id: I3e5cc10d6605f9cc41fa6b31da07a81364b72fe0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62009 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
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