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authornick_xr_chen <nick_xr_chen@wistron.corp-partner.google.com>2020-09-24 21:42:42 +0800
committerPatrick Georgi <pgeorgi@google.com>2020-09-28 09:33:37 +0000
commit0d5ac7440a1750169da3132d0e181a429d191002 (patch)
treee4c4615025be2bb43643a541eca775d8e0528853 /util/superiotool
parent1f2c59b099fb5dd3dabcb835816171101ab2494b (diff)
mb/google/volteer/variants/eldrid: Configure GPP_S4 and GPP_S5
GPP_S4 and GPP_S5 use as DMIC pins that need to be defined as NF2 BUG=b:168564129 Signed-off-by: nick_xr_chen <nick_xr_chen@wistron.corp-partner.google.com> Change-Id: Ia1fca960ac85f253882f0aa68b370eed49ac67b7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/45689 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com> Reviewed-by: Ravishankar Sarawadi <ravishankar.sarawadi@intel.com>
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