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authorMario Scheithauer <mario.scheithauer@siemens.com>2022-11-10 09:46:17 +0100
committerMartin L Roth <gaumless@gmail.com>2022-11-24 06:01:58 +0000
commite19f40377078375ed85f27e5028ed17d7857d6ca (patch)
tree076e547950025dd4af6cec4b07f954008c70e723 /util/superiotool/serverengines.c
parent155cf5cd2ee844e9fb86f0f2487ccca65e560f33 (diff)
mb/siemens/mc_ehl2: Enable Marvell PHY interrupt
On this mainboard Marvell PHY INTn is routed to LED[2] pin. Change-Id: I28a78afdcf0599bb998f906ce8056a0586e24f33 Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69434 Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/superiotool/serverengines.c')
0 files changed, 0 insertions, 0 deletions