diff options
| author | Michael Niewöhner <foss@mniewoehner.de> | 2020-10-19 00:37:35 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-01-13 11:51:48 +0000 |
| commit | ff23a58faf508a65f753b1df8bc5cb790ed2c479 (patch) | |
| tree | 49b4d5fb77751f616df0b792bb6378c3b85ef5de /util/superiotool/ite.c | |
| parent | 44509d866e5b30822c4aac680427244ed0950a22 (diff) | |
util/superiotool: add IT5570E registers
Add registers from IT5570E datsheet v0.3.1.
Tested on Clevo L141CU.
Change-Id: Idc764c6180e235298835d7639fcb0b562a2c21a4
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48922
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/superiotool/ite.c')
| -rw-r--r-- | util/superiotool/ite.c | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/util/superiotool/ite.c b/util/superiotool/ite.c index 3aa01b8a17..6e604a072e 100644 --- a/util/superiotool/ite.c +++ b/util/superiotool/ite.c @@ -8,6 +8,60 @@ #define ISA_PNP_ADDR 0x279 static const struct superio_registers reg_table[] = { + {0x5570, "IT5570E", { + {NOLDN, NULL, + {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,0x2b,0x2d,EOT}, + {0x55,0x70,NANA,0x01,RSVD,0x00,0x00,RSVD,RSVD,RSVD,RSVD,RSVD,0x00,EOT}}, + {0x01, "Serial Port 1 (UART1)", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf0,EOT}, + {0x00,0x02,0xf8,0x00,0x00,0x03,0x02,0x00,EOT}}, + {0x02, "Serial Port 2 (UART2)", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf0,EOT}, + {0x00,0x02,0xf8,0x00,0x00,0x03,0x02,0x00,EOT}}, + {0x04, "System Wake-Up Control (SWUC)", + {0x30,0x60,0x61,0x70,0x71,EOT}, + {0x00,0x00,0x00,0x00,0x01,EOT}}, + {0x05, "KBC Mouse", + {0x30,0x70,0x71,EOT}, + {0x00,0x0c,0x01,EOT}}, + {0x06, "KBC Keyboard", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT}, + {0x00,0x00,0x60,0x00,0x64,0x01,0x01,EOT}}, + {0x0a, "Consumer IR", + {0x30,0x60,0x61,0x70,0x71,EOT}, + {0x00,0x03,0x10,0x00,0x02,EOT}}, + {0x0f, "Shared Memory/Flash Interface (SMFI)", + {0x30,0x60,0x61,0x70,0x71,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6, + 0xf9,0xfa,0xfb,0xfc,EOT}, + {0x00,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x01,EOT}}, + {0x10, "RTC-like Timer (RTC)", + {0x30,0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67,0x68,0x69,0x70,0x71,0xf0, + 0xf1,0xf2,0xf3,0xf4,0xf5,EOT}, + {0x00,0x00,0x70,0x02,0x72,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x01,0x00, + 0x49,0x4a,0x00,0x00,0x00,EOT}}, + {0x11, "Power Management Interface Channel 1 (PMC1)", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT}, + {0x00,0x00,0x62,0x00,0x66,0x01,0x01,EOT}}, + {0x12, "Power Management Interface Channel 2 (PMC2)", + {0x30,0x60,0x61,0x62,0x63,0x64,0x65,0x70,0x71,0xf0,EOT}, + {0x00,0x00,0x68,0x00,0x6c,0x00,0x00,0x01,0x01,NANA,EOT}}, + {0x13, "Serial Peripheral Interface (SSPI)", + {0x30,0x60,0x61,0x70,0x71,EOT}, + {0x00,0x03,0x00,0x00,0x02,EOT}}, + {0x14, "Platform Environment Control Interface (PECI)", + {0x30,0x60,0x61,EOT}, + {0x00,0x00,0x00,EOT}}, + {0x17, "Power Management Interface Channel 3 (PMC3)", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT}, + {0x00,0x00,0x6a,0x00,0x6e,0x01,0x01,EOT}}, + {0x18, "Power Management Interface Channel 4 (PMC4)", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT}, + {0x00,0x00,0x74,0x00,0x78,0x01,0x01,EOT}}, + {0x19, "Power Management Interface Channel 5 (PMC5)", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT}, + {0x00,0x00,0x7a,0x00,0x7c,0x01,0x01,EOT}}, + {EOT}}}, {0x8228, "IT8228E", { {EOT}}}, {0x8500, "IT8500B/E", { |