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authorFurquan Shaikh <furquan@google.com>2020-12-28 13:49:28 -0800
committerPatrick Georgi <pgeorgi@google.com>2021-01-12 08:00:33 +0000
commitd64d426b4fb0730ed149571334331616582b3e00 (patch)
tree0600be57c1cfbb39fb6fa476ed34cca76d7a3476 /util/superiotool/ite.c
parent28e61f16341f2a2715ee8e963038f42e6e799eba (diff)
soc/intel/common/pcie: Add helper function for getting mask of enabled ports
This change adds a helper function `pcie_rp_enable_mask()` that returns a 32-bit mask indicating the status (enabled/disabled) of PCIe root ports (in the groups table) as configured by the mainboard in the device tree. With this helper function, SoC chip config does not need to add another `PcieRpEnable[]` config to identify what root ports are enabled. Change-Id: I7ce5fca1c662064fd21f0961dac13cda1fa2ca44 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48968 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/superiotool/ite.c')
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