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authorRen Kuo <ren.kuo@quanta.corp-partner.google.com>2024-08-29 09:49:55 +0800
committerFelix Held <felix-coreboot@felixheld.de>2024-09-02 09:01:33 +0000
commitc4762af6e05573ed18fbab6c5811a537e6b1f565 (patch)
treed18ee15a0ca95ca4052beb5a50ca19324c346b1a /util/superiotool/ite.c
parentcfcb3620acd4187f143fc3b129dd21b2aa34f1d8 (diff)
mb/google/brox/jubilant: Update dptf settings
Update dptf settings from thermal design: 1) Remove fan control and active policy, since fan is controlled by EC. 2) Modify TSRs to 0:DRAM, 1:SOC, 2:Charger 3) Update Pl2 min&max values BUG=None TEST= Build jubilant firmware Generate and check ACPI SSDT.dsl $ cat /sys/firmware/acpi/tables/SSDT > SSDT $ iasl -d SSDT Change-Id: I2d59eedea9fb25565709e118abc1a14b4c2a64e7 Signed-off-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84123 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Kenneth Chan <kenneth.chan@quanta.corp-partner.google.com> Reviewed-by: Bob Moragues <moragues@google.com>
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