diff options
| author | Tim Chen <Tim-Chen@quantatw.com> | 2016-12-28 14:44:52 +0800 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-01-03 16:53:45 +0100 |
| commit | 0984d1da43dae419695041d9792fa96da91b42aa (patch) | |
| tree | 781c36e6f977c3265635e42b1635f5551e967d7d /util/sconfig | |
| parent | df369af79e98960afde403d4375ed03f1a648e2a (diff) | |
mainboard/google/reef: Update DPTF parameters EVT1_v0.3
Update the DPTF parameters based on thermal test result.
(ZHT_DPTF_EVT1_v0.3_20161227.xlsx)
1. Update DPTF CPU/TSR1/TSR2 passive/critial trigger points.
CPU critical point:103
TSR1 passive point:45
TSR2 passive point:55, critical point:90
2. Change thermal relationship table (TRT) setting.
Change CPU Throttle Effect on CPU sample rate to 3secs
Change Charger Effect on Temp Sensor 2 sample rate to 60secs
Change CPU Effect on Temp Sensor 1 sample rate to 8secs
BUG=chrome-os-partner:60038
BRANCH=master
TEST=build and boot on electro dut
Change-Id: I3746750f7ea4a2e01153a36c28a5c33140c9e38c
Signed-off-by: Tim Chen <Tim-Chen@quantatw.com>
Reviewed-on: https://review.coreboot.org/17975
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'util/sconfig')
0 files changed, 0 insertions, 0 deletions