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authorDuncan Laurie <dlaurie@chromium.org>2016-05-07 20:01:34 -0700
committerDuncan Laurie <dlaurie@google.com>2016-05-16 19:49:59 +0200
commit4650f5baff017efce3d9873268efddc05bc267c3 (patch)
tree1e9b2c103f6fc8e7ae63dbb4404ab380098c7f5d /util/sconfig/sconfig.y
parentb7ce5fe31120d6fb7866f2e3e6c66b93bf185127 (diff)
sconfig: Add a new generic device type
Add support for a basic generic device in the devicetree to bind to a device that does not have a specific bus, but may need to be described in tables for the operating system. For instance some chips may have various GPIO connections that need described but do not fall under any other device. In order to support this export the basic 'scan_static_bus()' that can be used in a device_operations->scan_bus() method to scan for the generic devices. It has been possible to get a semi-generic device by using a fake PNP device, but that isn't really appropriate for many devices. Also Re-generate the shipped files for sconfig. Use flex 2.6.0 to avoid everything being rewritten. Clean up the local paths that leak into the generated configs. Change-Id: If45a5b18825bdb2cf1e4ba4297ee426cbd1678e3 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/14789 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com>
Diffstat (limited to 'util/sconfig/sconfig.y')
-rwxr-xr-xutil/sconfig/sconfig.y2
1 files changed, 1 insertions, 1 deletions
diff --git a/util/sconfig/sconfig.y b/util/sconfig/sconfig.y
index a5a063ff9e..b1e37a82b7 100755
--- a/util/sconfig/sconfig.y
+++ b/util/sconfig/sconfig.y
@@ -29,7 +29,7 @@ static struct device *cur_parent, *cur_bus;
int number;
}
-%token CHIP DEVICE REGISTER BOOL BUS RESOURCE END EQUALS HEX STRING PCI PNP I2C APIC CPU_CLUSTER CPU DOMAIN IRQ DRQ IO NUMBER SUBSYSTEMID INHERIT IOAPIC_IRQ IOAPIC PCIINT
+%token CHIP DEVICE REGISTER BOOL BUS RESOURCE END EQUALS HEX STRING PCI PNP I2C APIC CPU_CLUSTER CPU DOMAIN IRQ DRQ IO NUMBER SUBSYSTEMID INHERIT IOAPIC_IRQ IOAPIC PCIINT GENERIC
%%
devtree: { cur_parent = cur_bus = head; } chip { postprocess_devtree(); } ;