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authorMartin Roth <martin@coreboot.org>2019-09-15 17:36:09 -0700
committerFelix Held <felix-coreboot@felixheld.de>2019-10-13 19:36:23 +0000
commitd3a1a4171ee9f64f7721660f185b649ef874cc15 (patch)
treed5a24b8bdc8821a507e7e957d79e126698c05423 /util/romcc
parent1eb0e195d6fcc5b817be15ccde76a3d3f8b4d348 (diff)
src/superio: Remove unused superio chips
These SIOs are not being used or tested by abuild, so remove them from the tree. The only 3 currently unused SIOs that don't get removed here have board ports in review. src/superio/fintek/f71805f src/superio/fintek/f71872 src/superio/intel/i8900 src/superio/ite/it8671f src/superio/ite/it8716f src/superio/nsc/pc87309 src/superio/nsc/pc87360 src/superio/nsc/pc87366 src/superio/nsc/pc97317 src/superio/smsc/dme1737 src/superio/smsc/lpc47b272 src/superio/smsc/lpc47b397 src/superio/smsc/sch4037 src/superio/smsc/sio1036 src/superio/via/vt1211 src/superio/winbond/w83697hf src/superio/winbond/wpcd376i Signed-off-by: Martin Roth <martin@coreboot.org> Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I61d486d2c1e2b85eb292eaa78316c36e1735ebf4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/35428 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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