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| author | Furquan Shaikh <furquan@chromium.org> | 2017-05-23 11:53:47 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-05-25 18:37:33 +0200 |
| commit | a6f0b2754b0eea323db60d95fc59e1f08bc060e4 (patch) | |
| tree | f7095eaaf3fe2273cac5adebba4a67adc5810d86 /util/romcc | |
| parent | d635506fa7d8967ddec08a029a61a4ce57347ed5 (diff) | |
soc/intel/skylake: Implement GPIO ACPI AML generating functions
Implement GPIO ACPI AML generating functions that can be called by
coreboot drivers to generate GPIO manipulation code in AML. Following
API functions are implemented:
1. acpigen_soc_read_rx_gpio
2. acpigen_soc_get_tx_gpio
3. acpigen_soc_set_tx_gpio
4. acpigen_soc_clear_tx_gpio
In addition to the API functions above, helper functions are added to
gpio.asl to set/clear/get Tx value of GPIO.
BUG=b:62028489
Change-Id: I77e5d0decd8929a922d06b02312378f092551667
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/19828
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/romcc')
0 files changed, 0 insertions, 0 deletions