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author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2009-01-16 00:19:17 +0000 |
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committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2009-01-16 00:19:17 +0000 |
commit | abcddcd392bbe5e36e53ef8611df892812e2a367 (patch) | |
tree | 9a90786b87c81dd1289a104c364eaf38f5b55084 /util/romcc | |
parent | 6912846dda39e5c81993a64832301e78492ec254 (diff) |
Since all K8 targets now have CONFIG_USE_PRINTK_IN_CAR enabled, using
print_* in K8 RAM init does not make sense anymore. Convert almost all
print_* to printk_*. This improves readability a lot and makes the code
shorter.
Reorder the SPD equality checks in the dual channel DIMM compatibility
checking code. This is to make sure that we know if any other mismatches
are present in the DIMM. The new order eases debugging with the old
code.
Add a comment about false negatives in that code. This needs to be
implemented correctly, but that is hard to do in an efficient way.
Check if the DIMMS in a dual channel setup have any compatible CAS
latencies.
Add better comments to explain why wrong-at-first-glance SPD CL walking
code is actually correct.
Fix a few typos.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3865 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/romcc')
0 files changed, 0 insertions, 0 deletions