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authorEric Biederman <ebiederm@xmission.com>2003-06-18 11:03:18 +0000
committerEric Biederman <ebiederm@xmission.com>2003-06-18 11:03:18 +0000
commitd3283ec05f51056faa18610e952ccc81cb738313 (patch)
tree71279430d699e679cda9371fa7cf26005cc8b927 /util/romcc/tests
parent99acb49cf71ee7038216391ae2b0d09675ab6ce5 (diff)
- A new test case for romcc
- Minor romcc fixes - In smbus_wail_until_done a romcc glitch with || in romcc where it likes to run out of registers. Use | to be explicit that I don't need the short circuiting behavior. - Remove unused #defines from coherent_ht.c - Update the test in auto.c to 512M - Add definition of log2 to romcc_io.h - Implement SPD memory sizing in raminit.c - Reduce the number of memory devices back 2 to for the SOLO board. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@883 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/romcc/tests')
-rw-r--r--util/romcc/tests/simple_test33.c41
1 files changed, 41 insertions, 0 deletions
diff --git a/util/romcc/tests/simple_test33.c b/util/romcc/tests/simple_test33.c
new file mode 100644
index 0000000000..4caaa3a9e5
--- /dev/null
+++ b/util/romcc/tests/simple_test33.c
@@ -0,0 +1,41 @@
+static void main(void)
+{
+ unsigned long loops0, loops1, loops2;
+ unsigned long accum;
+
+ accum = 0;
+
+ loops0 = 10;
+ do {
+ unsigned short val;
+ val = __builtin_inw(0x10e0);
+ if (((val & 0x08) == 0) || (val == 1)) {
+ break;
+ }
+ } while(--loops0);
+ if (loops0 < 0) return;
+ accum += loops0;
+
+
+ loops1 = 20;
+ do {
+ unsigned short val;
+ val = __builtin_inw(0x10e0);
+ if (((val & 0x08) == 0) || (val == 1)) {
+ break;
+ }
+ } while(--loops1);
+
+ loops2 = 30;
+ do {
+ unsigned short val;
+ val = __builtin_inw(0x10e0);
+ if (((val & 0x08) == 0) || (val == 1)) {
+ break;
+ }
+ } while(--loops2);
+
+ accum += loops1 + loops0;
+}
+
+