diff options
author | Eric Biederman <ebiederm@xmission.com> | 2003-10-11 06:20:25 +0000 |
---|---|---|
committer | Eric Biederman <ebiederm@xmission.com> | 2003-10-11 06:20:25 +0000 |
commit | 83b991afff40e12a8b6756af06a472842edb1a66 (patch) | |
tree | a441ff0d88afcb0a07cf22dc3653db3e07a05c98 /util/romcc/tests/simple_test68.c | |
parent | 080038bfbd8fdf08bac12476a3789495e6f705ca (diff) |
- O2, enums, and switch statements work in romcc
- Support for compiling romcc on non x86 platforms
- new romc options -msse and -mmmx for specifying extra registers to use
- Bug fixes to device the device disable/enable framework and an amd8111 implementation
- Move the link specification to the chip specification instead of the path
- Allow specifying devices with internal bridges.
- Initial via epia support
- Opteron errata fixes
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1200 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/romcc/tests/simple_test68.c')
-rw-r--r-- | util/romcc/tests/simple_test68.c | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/util/romcc/tests/simple_test68.c b/util/romcc/tests/simple_test68.c new file mode 100644 index 0000000000..dd29658fdc --- /dev/null +++ b/util/romcc/tests/simple_test68.c @@ -0,0 +1,21 @@ +static void main(void) +{ + static const int cpu[] = { 0, 1, 2, 3 }; + int i; + for(i = 0; i < sizeof(cpu)/sizeof(cpu[0]); i++) { + static const unsigned int register_values[] = { + 0x0000c144, 0x0000f8f8, 0x00000000, + 0x0000c14C, 0x0000f8f8, 0x00000001, + 0x0000c154, 0x0000f8f8, 0x00000002, + 0x0000c15C, 0x0000f8f8, 0x00000003, + 0x0000c164, 0x0000f8f8, 0x00000004, + 0x0000c16C, 0x0000f8f8, 0x00000005, + 0x0000c174, 0x0000f8f8, 0x00000006, + 0x0000c17C, 0x0000f8f8, 0x00000007, + }; + int j; + int max = sizeof(register_values)/sizeof(register_values[0]); + for(j = 0; j < max; j += 3) { + } + } +} |