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authorEric Biederman <ebiederm@xmission.com>2003-07-12 01:40:54 +0000
committerEric Biederman <ebiederm@xmission.com>2003-07-12 01:40:54 +0000
commit34cadde255a5fd83fb44830f3eabb6c5b5b23aa9 (patch)
tree5540db07425657a7b4366b411cbab533d7ed2c3c /util/romcc/tests/simple_test60.c
parent58f74a25147bb93e4e7b7ecb6676ac0c462cf735 (diff)
- Commit more tests for romcc
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@951 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/romcc/tests/simple_test60.c')
-rw-r--r--util/romcc/tests/simple_test60.c32
1 files changed, 32 insertions, 0 deletions
diff --git a/util/romcc/tests/simple_test60.c b/util/romcc/tests/simple_test60.c
new file mode 100644
index 0000000000..55a5f19389
--- /dev/null
+++ b/util/romcc/tests/simple_test60.c
@@ -0,0 +1,32 @@
+struct mem_param {
+ unsigned char cycle_time;
+ unsigned char divisor;
+ unsigned char tRC;
+ unsigned char tRFC;
+ unsigned dch_memclk;
+ unsigned short dch_tref4k, dch_tref8k;
+ unsigned char dtl_twr;
+ char name[9];
+};
+
+static void test(void)
+{
+ static const struct mem_param param0 = {
+ .name = "166Mhz\r\n",
+ .cycle_time = 0x60,
+ .divisor = (6<<1),
+ .tRC = 0x3C,
+ .tRFC = 0x48,
+ .dch_memclk = 5 << 20,
+ .dch_tref4k = 0x02,
+ .dch_tref8k = 0x0A,
+ .dtl_twr = 3,
+ };
+ int value;
+ unsigned clocks;
+ const struct mem_param *param;
+ param = &param0;
+ value = 0x48;
+#warning "this generates word loads instead of byte loads"
+ clocks = (value + (param->divisor << 1) - 1)/(param->divisor << 1);
+}