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authorSubrata Banik <subrata.banik@intel.com>2017-08-14 16:30:59 +0530
committerAaron Durbin <adurbin@chromium.org>2017-08-15 23:12:22 +0000
commit588c2c42c3609785e3856f76bab884ff563b40ca (patch)
tree61d90dec73479d331557a5c96338feee2133404a /util/romcc/tests/raminit_test5.c
parent07f5b62aa83f0b08fb77c0c255638f532af1d1ea (diff)
soc/intel/cannonlake: Rectify LPC Lock Enable (LE) bit definition
LPC pci config register BIOS Control (BC) - offset 0xDC bit 1 is for Lock Down. Change-Id: I4780d2e41c833c0146640f715759dbb0a948c4ab Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/21001 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'util/romcc/tests/raminit_test5.c')
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