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| author | Felix Held <felix-coreboot@felixheld.de> | 2014-11-09 00:11:28 +0100 |
|---|---|---|
| committer | Mathias Krause <minipli@googlemail.com> | 2014-11-09 21:11:27 +0100 |
| commit | fac95e3bfe7d32ee1b9a89afd8a76c2c41c6b695 (patch) | |
| tree | c7884e7ed49adf4891707084deec06e1d74ed498 /util/romcc/romcc.1 | |
| parent | a6aecc41eff1fd26e6399f93f143951b4d16417b (diff) | |
inteltool: add more hardware IDs and PCIEXBAR/PXPEPBAR read support
Add IDs of some SNB and Haswell chips; use more descriptive names.
Add PCIEXBAR and PXPEPBAR read support for SNB/IVB/Haswell.
Change-Id: I16753bf90061fc2065b813b1c2169e7b7bcc89e8
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: http://review.coreboot.org/7360
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Mathias Krause <minipli@googlemail.com>
Diffstat (limited to 'util/romcc/romcc.1')
0 files changed, 0 insertions, 0 deletions