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| author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-08-14 02:50:44 -0500 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2015-11-26 01:09:16 +0100 |
| commit | 56c8ef9a91b9d78ca5d1c027e21f8c7f5c96bc8b (patch) | |
| tree | b56cd8b7cff76fc9d47f5398d5ac328c011dd649 /util/romcc/results | |
| parent | 259549678b010c519eac44d459f65ff81d412a34 (diff) | |
southbridge/amd/sr5650: Use correct PCI configuration block offset
Change-Id: I4277d1788d8f9a501399218544aa6d4d11349ccc
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/12049
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'util/romcc/results')
0 files changed, 0 insertions, 0 deletions