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authorSubrata Banik <subrata.banik@intel.com>2020-10-28 13:50:19 +0530
committerSubrata Banik <subrata.banik@intel.com>2020-11-05 07:29:44 +0000
commit70296654825ddf5dfbe4980f385e8617c009a97e (patch)
treeb46db1e853bca66a0fb4a2b9f14b686c9dc0944e /util/rockchip/LICENSE
parent1410224cf476ed5e666deffcbbc455055632add1 (diff)
mb/intel/adlrvp: Add support for DDR5 memory
This patch adds DDR5 memory configuration parameters to FSP. TEST=Able to build and boot ADLRVP with DDR5 memory. Change-Id: I4711d66c7b4b7b09e15a4d06e28c876ec35bc192 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46485 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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