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author | Aamir Bohra <aamir.bohra@intel.com> | 2017-05-11 19:33:41 +0530 |
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committer | Martin Roth <martinroth@google.com> | 2017-05-13 17:47:04 +0200 |
commit | fe6052c2e4090d15299435a27226a96f79d24872 (patch) | |
tree | 57fc2b77e9b28f222e9cbdab3254afdb9651d4e8 /util/riscvtools | |
parent | c3da3fe1d36c58f0d3acbf237f5848dd08dcf016 (diff) |
src/include/device: Add PCIe root ports device ids
Change-Id: Ic2df7fb1e4a3d3c52561b949c4b359ea59824387
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/19664
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/riscvtools')
0 files changed, 0 insertions, 0 deletions