diff options
author | Angel Pons <th3fanbus@gmail.com> | 2020-11-02 12:08:50 +0100 |
---|---|---|
committer | Angel Pons <th3fanbus@gmail.com> | 2020-11-23 13:00:14 +0000 |
commit | 93859e319e81f975db135c78d4c1494357b0aee8 (patch) | |
tree | b7ce92ea68109686a6164b9e56142e7d75cd6dfe /util/riscv | |
parent | 28ed7878f0275ca4e2db811d3413bafc70aac830 (diff) |
sb/intel/lynxpoint: Drop invalid SATA registers
Code was copy-pasted from older chips and has no effect on Lynxpoint.
Change-Id: I2c789ba48f175b3c9c9643118fc2209c94f24c3e
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47097
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'util/riscv')
0 files changed, 0 insertions, 0 deletions