diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2020-11-06 12:59:46 +0100 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2020-11-14 12:29:29 +0000 |
| commit | 77038b16fff3801b6209696cc4fea861800f1165 (patch) | |
| tree | 37b49d3fd647774e37be5da14b9d3cc784c05d21 /util/riscv | |
| parent | 6615c6eaf798556b94ecc44d241222d6b19cd119 (diff) | |
soc/intel/xeon_sp: Improve generating PCH IOAPIC MADT entry
The PCH IOAPIC ID is 0x8 so it needs to be generated before the IIO
IOAPICs. Since we will get rid of the ioapic_id array this makes it
more readable.
Change-Id: I64a3b259e438ef666fb68a433cceda10aebdb1bf
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47301
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Diffstat (limited to 'util/riscv')
0 files changed, 0 insertions, 0 deletions