diff options
| author | Meera Ravindranath <meera.ravindranath@intel.com> | 2020-04-01 16:04:39 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2020-04-28 09:40:09 +0000 |
| commit | 979c8c7caefdb0a41d18ddd3f1e3473edf6b7861 (patch) | |
| tree | 920837e0904c84ee9b2ad800368e0809b6bb2c66 /util/riscv/sifive-gpt.py | |
| parent | 8745a2743c046352725957c1657514b0d49309a6 (diff) | |
mb/intel/jasperlake_rvp: Update SMBIOS data for Jslrvp
1)Change Mainboard Part Number to jslrvp
2)Change Mainboard Family to Intel_jslrvp
3)Generate SMBIOS table and fill sku id information in SMBIOS
BUG=None
BRANCH=None
TEST=Mosys works on jslrvp and Sku ID info is generated
Change-Id: Iad0b394fea017223a5b98fff0cb4c2bd1d5a7bd7
Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40011
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/riscv/sifive-gpt.py')
0 files changed, 0 insertions, 0 deletions