summaryrefslogtreecommitdiff
path: root/util/post
diff options
context:
space:
mode:
authorSubrata Banik <subrata.banik@intel.com>2017-11-09 15:04:09 +0530
committerAaron Durbin <adurbin@chromium.org>2017-11-10 16:37:38 +0000
commit05e06cd0bef0d85de2466cfccf7c8ce375f950ee (patch)
tree6f17ea57c10bf91baa3337cef14c845aaee73ebd /util/post
parent330dc10cfd956df91855593b6f33b502c6883c55 (diff)
soc/intel/common: Fix CSE common code to accomodate Skylake/Kabylake
This patch ensures Skylake/Kabylake soc can make use of common CSE code in order to perform global reset using HECI interface. TEST=Build and boot on soraka/eve/reef/cnl-rvp Change-Id: I49b89be8106a19cde1eb9b488ac660637537ad71 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/22394 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'util/post')
0 files changed, 0 insertions, 0 deletions