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authorJens Rottmann <JRottmann@LiPPERTembedded.de>2013-03-07 19:02:15 +0100
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-03-08 00:56:19 +0100
commit00d673d165006b28bbbe5b2d84ef80d8665d8f34 (patch)
tree8029dce6c1c0ed034c3c2d966939cf8572d95290 /util/nvramtool/reg_expr.h
parent45f72ce60f41a655514c29698678cf3c1fb0c1a9 (diff)
FrontRunner/Toucan-AF: lower SPI speed to 22 MHz
The Hudson-E1's default SPI speed for normal i.e. non-fast reads is 66 MHz, but the SST 25VF032B datasheet allows max. 25. Lower the speed to 22 MHz, otherwise BIOS flashing fails. Change-Id: I22e87d833a3ebd316b6e873595a2480831533ab1 Signed-off-by: Jens Rottmann <JRottmann@LiPPERTembedded.de> Reviewed-on: http://review.coreboot.org/2605 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'util/nvramtool/reg_expr.h')
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