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authorFelix Held <felix-coreboot@felixheld.de>2024-05-21 16:35:26 +0200
committerFelix Held <felix-coreboot@felixheld.de>2024-05-22 15:46:16 +0000
commit9251ddc27de5171f779e7729a4c8e9cfc8b76221 (patch)
tree42d9aaa7540ab3bf63a13bc92778a81aee0ca569 /util/nvramtool/cmos_lowlevel.c
parentd4938ba37b30c9a0c84f6b33dd462f6d82ada772 (diff)
mb/amd/birman/devicetree_phoenix_opensil: add USB PHY config
Now that we also have the devicetree registers for the USB PHY config in the openSIL case, add the USB PHY config setting from the Phoenix with FSP devicetree. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I3a0acbf1b9d705dbf09f4480eb35e71e587ddd44 Reviewed-on: https://review.coreboot.org/c/coreboot/+/82585 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Diffstat (limited to 'util/nvramtool/cmos_lowlevel.c')
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