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authorShelley Chen <shchen@chromium.org>2017-11-22 16:55:27 -0800
committerShelley Chen <shchen@google.com>2017-11-25 08:31:40 +0000
commit5537f02bd59dd064ace6e06e3de473140550c9ab (patch)
tree5591a80a74d2802c58fdf7e21f1e81a9bb31556b /util/nvramtool/cbfs.c
parent6fd5a79d476b54f1670d0a06227b446ab003b2a1 (diff)
google/fizz: Disable unused i2c lines
As cr50 has now switched to using SPI, no need to enable the i2c1 anymore. Additionally, disabled unused I2C devices -- I2C0, I2C2 and I2C3. BUG=b:69374421 BRANCH=None TEST=test on fizz celeron. Make sure /dev/tpm0 created on (many) reboots. cat /proc/interrupts. Make sure # interrupts for 16 after booting is reasonable (not > 10k) and idma64.0, i2c_designware.0 are not listed with that interrupt line anymore. Should look something like this: 16: 1174 0 IO-APIC 16-fasteoi i801_smbus, snd_soc_skl, AudioDSP Change-Id: Iac3e31264a937a1d7ed6bd41632e7e065317781b Signed-off-by: Shelley Chen <shchen@chromium.org> Reviewed-on: https://review.coreboot.org/22576 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'util/nvramtool/cbfs.c')
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