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authorFurquan Shaikh <furquan@google.com>2015-07-13 10:14:16 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-07-16 22:37:11 +0200
commit7731cddaa22746f6884300177bd8c03aeeffadc2 (patch)
treef83218f23fc8de764192071ac5896d4254c1b6cd /util/nvramtool/accessors
parentfe48f0941e309751a210cacf6435632d86009ab4 (diff)
t210: SPI driver cleanup
1. Get rid of spi_delay - Instead have a tight loop to check for the spi status 2. The first check for SPI operation complete i.e. FIFOs have been processed is the SPI_STATUS_RDY bit. Thus, tegra_spi_wait should check for this bit before reading BLOCK_COUNT or any other fifo count field. 3. Flush both TX and RX FIFOs for SEND and RECV operations for PIO and DMA. 4. No need to check for rx_fifo_count == spi_byte_count to determine pio_finish operation. RDY bit should be sufficient to ensure that the SPI operation is complete. Added assert to ensure we never hit the case of RDY bit being set, yet rx_fifo_count != spi_byte_count for PIO. BUG=chrome-os-partner:41877 BRANCH=None TEST=Compiles successfully and reboot test runs successfully for 10K+ iterations. Change-Id: I1adb9672c1503b562309a8bc6c22fe7d2271768e Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: de1515605e17e0c6b81874f9f3c49fd0c1b92756 Original-Change-Id: I5853d0df1bfd6020a17e478040bc4c1834563fe4 Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/285141 Original-Reviewed-by: Jimmy Zhang <jimmzhang@nvidia.com> Original-Tested-by: Jimmy Zhang <jimmzhang@nvidia.com> Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> Original-Trybot-Ready: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/10947 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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