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| author | Arthur Heymans <arthur@aheymans.xyz> | 2017-06-13 14:12:38 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-06-16 15:57:12 +0200 |
| commit | 48d6b76d53a43c6924ed27303651aed5c6c6f34c (patch) | |
| tree | 2e0fe4b9edcaef8b27a9eb6424c2c47973145271 /util/nvramtool/ChangeLog | |
| parent | 3038b48de36d69c26c29977d1ff8afc7953febf3 (diff) | |
src/soc/intel/common: Don't allow user to change PCIe BAR
Change-Id: I254549057552be93611afa8ca52d22be220fe3dc
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/20178
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Diffstat (limited to 'util/nvramtool/ChangeLog')
0 files changed, 0 insertions, 0 deletions