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authorFelix Held <felix.held@amd.corp-partner.google.com>2021-09-20 15:09:05 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-09-21 13:56:26 +0000
commita0b25103574fe0eb112f85fa0099ed4e60841c11 (patch)
tree0c188f341215f36c7679fb955501cb97ff8c9413 /util/msrtool
parentd94f8bbe9da290e120df20bf244920436e9510e7 (diff)
soc/amd/cezanne/fsp_m_params: use DEV_PTR to check if device is enabled
The aliases are defined in the chipset devicetree, so the device pointers will be available for all boards using this SoC. TEST=None Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Id655e9eba9b8e9898fa01bf03876074e136cc7c6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57779 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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