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| author | Felix Held <felix-coreboot@felixheld.de> | 2021-01-28 23:40:52 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-01-29 22:57:01 +0000 |
| commit | 230dbd6d3c194d9f839d31a0a579ef99befdd097 (patch) | |
| tree | 67ee11f634a24c5afa539027f700637c8029a1b4 /util/msrtool/intel_nehalem.c | |
| parent | faaafb4db121f4413718a7fa1fd771530097e662 (diff) | |
soc/amd/cezanne: add empty ramstage FCH support
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I38c6961b65b89cb57ff80e491bf8973be4e12eeb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50094
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'util/msrtool/intel_nehalem.c')
0 files changed, 0 insertions, 0 deletions