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authorSubrata Banik <subrata.banik@intel.com>2021-09-21 20:12:06 +0530
committerSubrata Banik <subrata.banik@intel.com>2021-09-30 06:28:19 +0000
commita834a6eede3065b954f8bebcc77bd2df557b4a18 (patch)
tree4713fdc76e9fd404715792df8ea88061fd832c6b /util/marvell
parent37231fb2feef20b8cc4a7fc039130ed560c93334 (diff)
soc/intel/alderlake: Perform `soc_finalize` at entry of BS_PAYLOAD_BOOT
This patch ensures soc_finalize() is getting called at the entry of BS_PAYLOAD_BOOT boot state instead of BS_PAYLOAD_LOAD, BS_ON_EXIT. The purpose of this change is to accommodate more time to push out sending CSE EOP messages at post. BUG=b:200644229 TEST=coreboot serial log suggests soc_finalize() is getting called as part of the BS_PAYLOAD_BOOT entry. Finalizing chipset. apm_control: Finalizing SMM. APMC done. BS: BS_PAYLOAD_BOOT entry times (exec / console): 21 / 15 ms Change-Id: I8632eca057255d7f4a38b64fd17c1f3d84123051 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57801 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Diffstat (limited to 'util/marvell')
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