soc/intel/jasperlake: Enable Intel FIVR RFI settings

We already have RFI UPD settings to mitigate RFI noise issues in
platform. These UPDs were not getting filled via devicetree but
needed to be filled from fsp_params.c

Exporting these UPDs to chip.h will allow OEM/ODMs to fill it
directly from devicetree and also allow us to control it based
on boards instead of keeping it common across SoCs.

BUG=b:171683785
BRANCH=None
TEST=Compilation works and we're able to fill UPD from devicetree.Value
gets reflected in FSP UPDs.

Change-Id: I495cd2294368e6b3035c48b9556a83418d5632de
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47286
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

0 files changed, 0 insertions, 0 deletions