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authorLee Leahy <leroy.p.leahy@intel.com>2016-07-31 16:49:28 -0700
committerLee Leahy <leroy.p.leahy@intel.com>2016-08-03 06:20:18 +0200
commitb20d4ba57a04f878815a1355faa6a93d6f14e494 (patch)
tree275b971ecef40e31cab2bf7d1e119d069df8f975 /util/marvell/Makefile.inc
parent94e502be7aa19d2375e186cceaa771a77818bf9e (diff)
drivers/intel/fsp2_0: Update the debug levels
Choose appropriate debug levels for the various messages in the FSP driver. Change: * BIOS_DEBUG --> BIOS_SPEW: Normal FSP driver output level, allows builder to disable FSP driver output by selecting CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 * BIOS_ERROR --> BIOS_CRIT: These errors will prevent coreboot and the payload from successfully booting TEST=Build and run on Galileo Gen2 Change-Id: Ic3352de2022e16482bf47fc953aedeef8f0c2880 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/16003 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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