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authorShelley Chen <shchen@chromium.org>2017-04-07 09:15:42 -0700
committerMartin Roth <martinroth@google.com>2017-04-24 19:17:47 +0200
commit031c81863316e32ddec2a8360011e424fe9c845c (patch)
treebf35d2e840a31e4de602f22b4027ead7ce4353db /util/lint
parentb7f28700f4e114a12215842d31e29af734a191e2 (diff)
google/fizz: Configure memory
Read DRAM SPD and populate MemorySpdPtr fields in UPD data structure for FSP. BUG=b:36490168, b:35775024 BRANCH=None TEST=./util/abuild/abuild -p none -t google/fizz -x -a We are currently working on bringup and have no hardware to test on yet. Change-Id: I191cc6bf1fd8aa461855c538b48fd39e3ffd7848 Signed-off-by: Shelley Chen <shchen@chromium.org> Reviewed-on: https://review.coreboot.org/19205 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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