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authorTim Crawford <tcrawford@system76.com>2022-01-07 14:12:34 -0700
committerFelix Held <felix-coreboot@felixheld.de>2022-01-25 18:05:35 +0000
commit2a404b599b3385b3246a2ee20844d2bc7a428035 (patch)
tree64541bbb7f407c3c8e2615240e5454a67c4d0b80 /util/lint/lint-stable-005-board-status
parentb65c3015b0c931b8ad7897a9835798cd97dbcf5b (diff)
mb/system76: Enable SrcClk pin for CPU PCIe RPs
This reverts commit bd9b044a96cc ("mb/system76: rtd3: Remove SrcClk pin on CPU RP"). Previously, RTD3 expected a PCH index for the root port and did not work with the CPU PCIe RP present on TGL, so SrcClk pin was disabled. Set them now that RTD3 supports mapping the index for the CPU RP. Change-Id: Ia7519b9f5a2be52cd5575615c28d20371a26996b Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60914 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Jeremy Soller <jeremy@system76.com>
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