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authorRaul E Rangel <rrangel@chromium.org>2020-07-13 16:10:34 -0600
committerPatrick Georgi <pgeorgi@google.com>2020-07-15 08:38:43 +0000
commit742abd3daf6be57de2df5002b8985ad36884c959 (patch)
treecdfae09c0acf514a7b26c5256742e88f32ed281e /util/kconfig/zconf.hash.c_shipped
parent1aa5cff70908a18b1bd0fd41b2e2ad7014cf9813 (diff)
soc/amd/picasso/acpi: Delete unused and invalid OperationRegions
0xc50, 0xc52, 0xc6f don't exist on Picasso. The PCI config space registers define SATA and OHCI which are at the wrong bus locations. I just remove the whole section since it's not used. We never access the PCIe Error region, or the PM2 region either. BUG=b:153001807, b:154756391 TEST=Build Trembyle Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I98aee09770f1df9f553c94580c1ee00c06a9cec1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/43427 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
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