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authorWonkyu Kim <wonkyu.kim@intel.com>2020-01-23 00:06:07 -0800
committerPatrick Georgi <pgeorgi@google.com>2020-01-28 18:36:52 +0000
commit9f2e3ad6280000b818c71ebd250430509a819553 (patch)
tree544a91b954b537f298eb0ebd0cb0cea4d86aef9c /util/kconfig/regex.h
parent61657c2fae46e1ed8e2a4ddd42a2aa3caa8accfa (diff)
soc/intel/tigerlake: Enable DP ports according to board design
BUG=none BRANCH=none TEST=Build and boot tigerlake rvp board and check FSP log or DP port pin mux from pinctl driver. Signed-off-by: Wonkyu Kim <wonkyu.kim@intel.com> Change-Id: Ia6e9271a11a1f9e6f98923772219ccc1e7daecda Reviewed-on: https://review.coreboot.org/c/coreboot/+/38528 Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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