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authorJonathan Zhang <jonzhang@fb.com>2020-09-03 14:31:37 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-09-08 05:36:34 +0000
commit5bb89e7f0c7e08142cd05dd176b459771d81b8e1 (patch)
tree498e32c52f63c8ef56f9d461c97878520b3bb56b /util/kconfig/lkc.h
parent27dd66aca7613e3851a1b7a2826272c9c50e1697 (diff)
vendorcode/intel/FSP2_0/CPX-SP: update to ww36
Intel CPX-SP FSP ww36 release has following changes: * Update FSP header version to change among FSP releases. * Add SPDRegVen field in memory map HOB, to facilitate SMBIOS type 11 (OEM strings) generation. Signed-off-by: Jonathan Zhang <jonzhang@fb.com> Change-Id: I7a8dab3987c2f8f471b40f7b3b9ced0c2909271d Reviewed-on: https://review.coreboot.org/c/coreboot/+/45100 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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