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authorMaulik V Vaghela <maulik.v.vaghela@intel.com>2021-11-08 07:53:37 +0000
committerTim Wawrzynczak <twawrzynczak@chromium.org>2021-11-17 15:54:10 +0000
commit85d9f470144b8a125b5e439de19138fd5d83c1d5 (patch)
treef7ac1d12e301788b7395ddc19f25a3ed4d99b410 /util/kbc1126/description.md
parentd16a085110d42e28d273e94f96b60ef39c4bb0c2 (diff)
Revert "soc/intel/adl: Drop SGPM, RGPM and EGPM methods"
This reverts commit 1399442289607acc5203fb12df64e9081b3c3aa4. Reason for revert: Some Cr50 chips with old firmware version (x.y.22) don't support long pulse interrupt command, requiring dynamic GPIO PM to be disabled to intercept short pulse interrupt. Due to this coreboot needs to expose SGPM, RGPM and EGPM ACPI methods to support power gating of GPIO communities from the kernel when dynamic GPIO PM is disabled. BUG=b:204832081 BRANCH=None Test= S0ix works with dynamic PM disabled. Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Change-Id: I2b5b00878062f8a499641d7a47db54ed078cd6cf Reviewed-on: https://review.coreboot.org/c/coreboot/+/58811 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Scott Chao <scott_chao@wistron.corp-partner.google.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
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