soc/intel/skylake: Set xtal bypass on low power idle

When using Wake On Voice &/or DCI, it requires xtal to be active during
low power idle.

With xtal being active  in S0ix state power impact is 1-2 mW.

Hence set xtal bypass bit in CIR31C for low power idle entry.

TEST= Build with s0ix enable for Poppy. Boot to OS & verify that
bit 22 of CIR31C register is set. s0ix works.

Change-Id: Ide2d01536f652cd1b0ac32eede89ec410c5101cf
Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com>
Reviewed-on: https://review.coreboot.org/19442
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>

0 files changed, 0 insertions, 0 deletions