diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2016-02-09 09:40:39 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2016-02-15 08:07:11 +0100 |
| commit | 6f0e6fa6e125a7919a6b7836fa119e0074dca250 (patch) | |
| tree | 6d9e3c7aa3a7ef36711eb22f749aec14be8bfddb /util/ipqheader | |
| parent | 5f0cd58e0e32c930011865224792ae83aff3d406 (diff) | |
skylake: Finalize SMM in coreboot
Once we lock down the SPI BAR we need to tell SMM to re-init its
SPI driver or it will be unable to write ELOG events via SMI.
This SMI is also sent at the end of depthcharge so there was just
a window where SMI events could get lost.
BUG=chrome-os-partner:50076
BRANCH=glados
TEST=enable DEBUG_SMI, boot to dev screen, press power button and
see elog events get added without without transaction errors.
Change-Id: I1f14717b5e7f29c158dde8fd308bdbfb67eba41a
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 60ca24c760c70e2ebe5f3e68f95d3ffdba0fef9e
Original-Change-Id: I4e323249f00954e290a6a30f515e34632681bfdd
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/326861
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/13697
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'util/ipqheader')
0 files changed, 0 insertions, 0 deletions