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authorStefan Reinauer <stepan@coresystems.de>2008-03-10 22:26:18 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2008-03-10 22:26:18 +0000
commit2aa14367774bc19ab4df4ff527e15d5e73258ddd (patch)
tree3911524a250836627739f0034c535f20febbd303 /util/inteltools/ich_gpio.8
parent0719b8e4606b23d4c9822cb7c8121a87068c73ed (diff)
Add GPIO dumping utility for Intel ICH series southbridges.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Signed-off-by: Joseph Smith <joe@smittys.pointclark.net> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3132 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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+.TH ICH_GPIO 8 "March 8, 2008"
+.SH NAME
+ich_gpio \- Intel southbridge GPIO Dump Utility
+.SH SYNOPSIS
+.B ich_gpio
+.SH DESCRIPTION
+.B ich_gpio
+is a user-space utility which can dump all
+register contents of the Intel ICH series Southbridges.
+.PP
+It is mainly used for coreboot development purposes (see coreboot.org
+for details on coreboot), but it may also be useful for other things.
+.PP
+Here is an example output:
+.br
+[root@localhost dumpgpio]# ich_gpio
+.br
+Intel Southbridge: 8086:24c0
+.br
+GPIOBASE = 0x0500
+.br
+gpiobase+0x0000: 0x1a003180
+.br
+gpiobase+0x0004: 0x0900ffff
+.br
+gpiobase+0x0008: 0x00000000
+.br
+gpiobase+0x000c: 0x1bbf0000
+.br
+gpiobase+0x0010: 0x00000000
+.br
+gpiobase+0x0014: 0x00000000
+.br
+gpiobase+0x0018: 0x00040000
+.br
+gpiobase+0x001c: 0x00000000
+.br
+gpiobase+0x0020: 0x00000000
+.br
+gpiobase+0x0024: 0x00000000
+.br
+gpiobase+0x0028: 0x00000000
+.br
+gpiobase+0x002c: 0x00003000
+.br
+gpiobase+0x0030: 0x00000fff
+.br
+gpiobase+0x0034: 0x00000e00
+.br
+gpiobase+0x0038: 0x00000fff
+.br
+gpiobase+0x003c: 0x00000000
+.PP
+Please consult your datasheet for the register meanings.
+.SH OPTIONS
+No command line options needed just run ich_gpio.
+.SH AUTHORS
+Please see the individual source code files.
+