diff options
author | Matthew Garrett <mjg59@google.com> | 2018-07-23 21:09:47 -0700 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2018-12-28 22:31:54 +0000 |
commit | 2bf28e52eef2d63aac166906d7bcb72c59586177 (patch) | |
tree | a74706124eb739d0483889a81cd3bdb059aad0a6 /util/inteltool/pcie.c | |
parent | 6ece0adf8cb68c4d74093d15b647a2d541123e8a (diff) |
util/inteltool: Add support for Sunrise Point LP
Used documents:
334658 (Sunrise Point-LP I/O datasheet vol. 1)
334659 (Sunrise Point-LP I/O datasheet vol. 2)
332690 (Sunrise Point I/O datasheet vol. 1)
Change-Id: I16237ffc9a225b46271f2a51d77a7f28dfc36138
Signed-off-by: Felix Singer <migy@darmstadt.ccc.de>
Reviewed-on: https://review.coreboot.org/c/28623
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'util/inteltool/pcie.c')
-rw-r--r-- | util/inteltool/pcie.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/util/inteltool/pcie.c b/util/inteltool/pcie.c index cf4b6b6379..5b35dbdde9 100644 --- a/util/inteltool/pcie.c +++ b/util/inteltool/pcie.c @@ -267,6 +267,9 @@ int print_epbar(struct pci_dev *nb) case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_M: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D: + case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_U: + case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_Y: + case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_U_Q: epbar_phys = pci_read_long(nb, 0x40) & 0xfffffffe; epbar_phys |= ((uint64_t)pci_read_long(nb, 0x44)) << 32; break; @@ -389,6 +392,9 @@ int print_dmibar(struct pci_dev *nb) case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_M: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D: + case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_U: + case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_Y: + case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_U_Q: dmi_registers = skylake_dmi_registers; size = ARRAY_SIZE(skylake_dmi_registers); dmibar_phys = pci_read_long(nb, 0x68); @@ -495,6 +501,9 @@ int print_pciexbar(struct pci_dev *nb) case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_M: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D: + case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_U: + case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_Y: + case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_U_Q: pciexbar_reg = pci_read_long(nb, 0x60); pciexbar_reg |= ((uint64_t)pci_read_long(nb, 0x64)) << 32; break; |